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Interleaved and Concurrent NAND Operations — SSD Firmware Development — Part 8

Lan D. Phan
4 min readOct 16, 2018

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Welcome back. We left off previously with some questions in our minds as to what would happen during write operations when the timing characteristics differ. Let’s consider when the device busy time is much slower than the data transfer time.

Figure 1 — Page write timing

Here we have doubled the device busy time (compared to itself previously), making it approximately twice as long as the data transfer time. Let’s investigate the operation diagram.

Now there is a gap between the data transfers, obviously no longer optimal. Totaling the time we have 25ns + 125ns + 204.8us + 25ns + 400us + 25ns + 125ns + 204.8us + 25ns + 25ns + 125ns + 204.8us + 25ns + 400us = 1.414925ms. This is about 22MiB/s. Note that the large reduction is not only due to the gap, but also the longer busy time at the end. In fact, the longer the busy time, the larger the gap gets and the longer the end time becomes as well.

Is this a good time to throw in more NAND devices?

Totaling the time in this case we have (25ns + 125ns + 204.8us + 25ns) * 4 + 400us = 1.219888ms. This gives us 25.60MiB/s bandwidth.

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